1. Technical Field
The present invention generally relates to the common fabrication of three-dimensional semiconductor devices and Radio-Frequency (RF) semiconductor devices. More particularly, the present invention relates to such common fabrication via local Silicon-on-Insulator (SOI) for the RF devices.
2. Background Information
Currently, the parasitic resistance/capacitance of three-dimensional transistors (e.g., FinFETs) is considered too high for many Radio-Frequency (RF) applications, as compared to planar bulk MOSFETs. In addition, current FinFET technology has focused largely on optimization for logic functions. Silicon-on-Insulator (SOI) type CMOS technology, having comparatively lower parasitic resistance/capacitance, shows better RF performance than bulk CMOS. Thus, at present, SOI would appear to be the best technology for RF applications.
Therefore, a need exists to cost-effectively co-fabricate RF semiconductor devices with three-dimensional semiconductor devices while reducing the parasitic resistance/capacitance of the three-dimensional devices.